scsi: ufs: host: mediatek: Adjust sync length for FASTAUTO mode
Set the sync length for FASTAUTO G1 mode in the UFS Mediatek driver. This ensures the sync length meets minimum values for high-speed gears, improving stability during power mode changes. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Acked-by: Chun-Hung Wu <chun-hung.wu@mediatek.com> Link: https://patch.msgid.link/20250924094527.2992256-5-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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committed by
Martin K. Petersen
parent
16b42c4281
commit
1fd05367d5
@@ -1332,6 +1332,36 @@ static bool ufs_mtk_pmc_via_fastauto(struct ufs_hba *hba,
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return true;
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}
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static void ufs_mtk_adjust_sync_length(struct ufs_hba *hba)
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{
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int i;
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u32 value;
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u32 cnt, att, min;
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struct attr_min {
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u32 attr;
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u32 min_value;
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} pa_min_sync_length[] = {
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{PA_TXHSG1SYNCLENGTH, 0x48},
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{PA_TXHSG2SYNCLENGTH, 0x48},
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{PA_TXHSG3SYNCLENGTH, 0x48},
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{PA_TXHSG4SYNCLENGTH, 0x48},
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{PA_TXHSG5SYNCLENGTH, 0x48}
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};
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cnt = sizeof(pa_min_sync_length) / sizeof(struct attr_min);
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for (i = 0; i < cnt; i++) {
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att = pa_min_sync_length[i].attr;
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min = pa_min_sync_length[i].min_value;
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ufshcd_dme_get(hba, UIC_ARG_MIB(att), &value);
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if (value < min)
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ufshcd_dme_set(hba, UIC_ARG_MIB(att), min);
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ufshcd_dme_peer_get(hba, UIC_ARG_MIB(att), &value);
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if (value < min)
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ufshcd_dme_peer_set(hba, UIC_ARG_MIB(att), min);
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}
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}
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static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
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const struct ufs_pa_layer_attr *dev_max_params,
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struct ufs_pa_layer_attr *dev_req_params)
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@@ -1355,6 +1385,8 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
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}
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if (ufs_mtk_pmc_via_fastauto(hba, dev_req_params)) {
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ufs_mtk_adjust_sync_length(hba);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), true);
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ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), UFS_HS_G1);
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@@ -111,6 +111,9 @@
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#define PA_TXLINKSTARTUPHS 0x1544
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#define PA_AVAILRXDATALANES 0x1540
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#define PA_MINRXTRAILINGCLOCKS 0x1543
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#define PA_TXHSG1SYNCLENGTH 0x1552
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#define PA_TXHSG2SYNCLENGTH 0x1554
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#define PA_TXHSG3SYNCLENGTH 0x1556
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#define PA_LOCAL_TX_LCC_ENABLE 0x155E
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#define PA_ACTIVETXDATALANES 0x1560
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#define PA_CONNECTEDTXDATALANES 0x1561
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@@ -160,7 +163,9 @@
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#define PA_PACPFRAMECOUNT 0x15C0
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#define PA_PACPERRORCOUNT 0x15C1
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#define PA_PHYTESTCONTROL 0x15C2
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#define PA_TXHSADAPTTYPE 0x15D4
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#define PA_TXHSG4SYNCLENGTH 0x15D0
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#define PA_TXHSADAPTTYPE 0x15D4
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#define PA_TXHSG5SYNCLENGTH 0x15D6
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/* Adpat type for PA_TXHSADAPTTYPE attribute */
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#define PA_REFRESH_ADAPT 0x00
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