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soc: renesas: rcar-rst: Keep RESBAR2S in default state

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Unlike Gen2, Gen4 has bit 15 of WDTRSTCR register also used. Keep it in
the default state for the V3U firmware workaround.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251017114234.2968-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Wolfram Sang
2025-10-17 13:42:34 +02:00
committed by Geert Uytterhoeven
parent 3a86608788
commit 4765d59fcf
1 changed files with 2 additions and 1 deletions
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3
drivers/soc/renesas/rcar-rst.c
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@@ -12,6 +12,7 @@
#define WDTRSTCR_RESET 0xA55A0002
#define WDTRSTCR 0x0054
#define GEN4_WDTRSTCR_RESET 0xA55A8002
#define GEN4_WDTRSTCR 0x0010
#define CR7BAR 0x0070
@@ -30,7 +31,7 @@ static int rcar_rst_enable_wdt_reset(void __iomem *base)
static int rcar_rst_v3u_enable_wdt_reset(void __iomem *base)
{
iowrite32(WDTRSTCR_RESET, base + GEN4_WDTRSTCR);
iowrite32(GEN4_WDTRSTCR_RESET, base + GEN4_WDTRSTCR);
return 0;
}