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MIPS: MSC01: Convert to new irq_chip functions

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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2188/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Gleixner
2011-03-23 21:08:59 +00:00
committed by Ralf Baechle
parent aa400ae5ec
commit e15883da8a
1 changed files with 24 additions and 27 deletions
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51
arch/mips/kernel/irq-msc01.c
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@@ -28,8 +28,10 @@ static unsigned long _icctrl_msc;
static unsigned int irq_base; static unsigned int irq_base;
/* mask off an interrupt */ /* mask off an interrupt */
static inline void mask_msc_irq(unsigned int irq) static inline void mask_msc_irq(struct irq_data *d)
{ {
unsigned int irq = d->irq;
if (irq < (irq_base + 32)) if (irq < (irq_base + 32))
MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base));
else else
@@ -37,8 +39,10 @@ static inline void mask_msc_irq(unsigned int irq)
} }
/* unmask an interrupt */ /* unmask an interrupt */
static inline void unmask_msc_irq(unsigned int irq) static inline void unmask_msc_irq(struct irq_data *d)
{ {
unsigned int irq = d->irq;
if (irq < (irq_base + 32)) if (irq < (irq_base + 32))
MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base));
else else
@@ -48,9 +52,11 @@ static inline void unmask_msc_irq(unsigned int irq)
/* /*
* Masks and ACKs an IRQ * Masks and ACKs an IRQ
*/ */
static void level_mask_and_ack_msc_irq(unsigned int irq) static void level_mask_and_ack_msc_irq(struct irq_data *d)
{ {
mask_msc_irq(irq); unsigned int irq = d->irq;
mask_msc_irq(d);
if (!cpu_has_veic) if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0); MSCIC_WRITE(MSC01_IC_EOI, 0);
/* This actually needs to be a call into platform code */ /* This actually needs to be a call into platform code */
@@ -60,9 +66,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
/* /*
* Masks and ACKs an IRQ * Masks and ACKs an IRQ
*/ */
static void edge_mask_and_ack_msc_irq(unsigned int irq) static void edge_mask_and_ack_msc_irq(struct irq_data *d)
{ {
mask_msc_irq(irq); unsigned int irq = d->irq;
mask_msc_irq(d);
if (!cpu_has_veic) if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0); MSCIC_WRITE(MSC01_IC_EOI, 0);
else { else {
@@ -74,15 +82,6 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
smtc_im_ack_irq(irq); smtc_im_ack_irq(irq);
} }
/*
* End IRQ processing
*/
static void end_msc_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
unmask_msc_irq(irq);
}
/* /*
* Interrupt handler for interrupts coming from SOC-it. * Interrupt handler for interrupts coming from SOC-it.
*/ */
@@ -107,22 +106,20 @@ static void msc_bind_eic_interrupt(int irq, int set)
static struct irq_chip msc_levelirq_type = { static struct irq_chip msc_levelirq_type = {
.name = "SOC-it-Level", .name = "SOC-it-Level",
.ack = level_mask_and_ack_msc_irq, .irq_ack = level_mask_and_ack_msc_irq,
.mask = mask_msc_irq, .irq_mask = mask_msc_irq,
.mask_ack = level_mask_and_ack_msc_irq, .irq_mask_ack = level_mask_and_ack_msc_irq,
.unmask = unmask_msc_irq, .irq_unmask = unmask_msc_irq,
.eoi = unmask_msc_irq, .irq_eoi = unmask_msc_irq,
.end = end_msc_irq,
}; };
static struct irq_chip msc_edgeirq_type = { static struct irq_chip msc_edgeirq_type = {
.name = "SOC-it-Edge", .name = "SOC-it-Edge",
.ack = edge_mask_and_ack_msc_irq, .irq_ack = edge_mask_and_ack_msc_irq,
.mask = mask_msc_irq, .irq_mask = mask_msc_irq,
.mask_ack = edge_mask_and_ack_msc_irq, .irq_mask_ack = edge_mask_and_ack_msc_irq,
.unmask = unmask_msc_irq, .irq_unmask = unmask_msc_irq,
.eoi = unmask_msc_irq, .irq_eoi = unmask_msc_irq,
.end = end_msc_irq,
}; };