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dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart

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The Anlogic DR1V90 SoC integrates a UART controller compatible with
snps,dw-apb-uart, operating at a 50 MHz clock.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Junhui Liu
2025-10-21 17:41:43 +08:00
committed by Conor Dooley
parent ccc3fd3ebe
commit a94f9be294
1 changed files with 1 additions and 0 deletions
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Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
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@@ -51,6 +51,7 @@ properties:
- const: renesas,rzn1-uart - const: renesas,rzn1-uart
- items: - items:
- enum: - enum:
- anlogic,dr1v90-uart
- brcm,bcm11351-dw-apb-uart - brcm,bcm11351-dw-apb-uart
- brcm,bcm21664-dw-apb-uart - brcm,bcm21664-dw-apb-uart
- rockchip,px30-uart - rockchip,px30-uart